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SGM802 low-power, sc70/sot p reset circuit with capacitor-adjustable reset timeout delay general description the SGM802 low-power micro-processor supervisor circuit monitors system voltages from 1.6v to 5v. this device performs a single function: it asserts a reset signal whenever the v cc supply voltage falls below its reset threshold. the reset output remains asserted for the reset timeout period after v cc rises above the reset threshold. the reset timeout is externally set by a capacitor to provide more flexibility. the SGM802 has an active-high, push-pull reset output. it is available in green sc70-4 (r) and sot-143 packages. the SGM802 is specified over an ambient temperature range of -40 to +85 . features ? monitor system voltages from 1.6v to 5v ? capacitor-adjustable reset timeout period ? low quiescent current (3a typ) ? push-pull reset output option ? guaranteed reset valid to v cc = 1v ? immune to short v cc transients ? available in green sc70-4 (r) and sot-143 packages applications portable equipment battery-powered computers/controllers automotive medical equipment intelligent instruments embedded controllers critical p monitoring set-top boxes computers typical application microprocessor system gnd SGM802 reset reset gnd v cc v cc srt c srt rev. a. 2 sg micro corp www.sg-micro.com
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 2 sg micro corp www.sg-micro.com package/ordering information model pin-package reset threshold (typ) ordering number package marking packing option 1.63v SGM802-1.63yka4g/tr s78xx tape and reel, 3000 2.32v SGM802-2.32yka4g/tr s79xx tape and reel, 3000 2.63v SGM802-2.63yka4g/tr s7axx tape and reel, 3000 sot-143 2.93v SGM802-2.93yka4g/tr s7bxx tape and reel, 3000 1.63v SGM802-1.63yc4g/tr s7dxx tape and reel, 3000 2.32v SGM802-2.32yc4g/tr s7exx tape and reel, 3000 2.63v SGM802-2.63yc4g/tr s7fxx tape and reel, 3000 SGM802 sc70-4 (r) 2.93v SGM802-2.93yc4g/tr s80xx tape and reel, 3000 note: xx = date code. green (rohs & hsf): sg micro corp defines "green" to mean pb-free (rohs compatible) and free of halogen substances. if you have additional comments or questions, please contact your sgmicro representative directly. marking information for example: s78ba (2011, january) syy x x date code - year ("a" = 2010, "b" = 2011 ) date code - month ("a" = jan. "b" = feb. "l" = dec.) chip i.d. absolute maximum ratings all voltages referenced to gnd v cc .............................................................................-0.3v to 6v srt, reset (push-pull)............................-0.3v to (v cc + 0.3v) input current (all pins)... ..................... ............... ................20ma output current (reset) ............... ..................... ...............20ma operating temperature range ............ ...............-40 to +85 storage temperature range ............................-65 to +150 junction temperature........................................................150 lead temperature (soldering, 10s) ..................................260 esd susceptibility hbm............... .................. ................. .................. ............. 3000v mm......................................................................................300v note: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the s pecifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. caution this integrated circuit can be damaged by esd if you don?t pay attention to esd protection. sgmicro recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. sgmicro reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. please contact sgmicro sales office to get the latest datasheet.
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 3 sg micro corp www.sg-micro.com pin configurations (top view) SGM802 1 2 3 4 srt sc70-4 (r) gnd v cc reset SGM802 1 3 4 2 srt reset sot-143 gnd v cc pin description pin sot-143 sc70-4 (r) name function 1 2 gnd ground. 2 1 v cc supply voltage and reset threshold monitor input. 3 3 srt set reset timeout input. connect a capacitor between srt and ground to set the timeout period. determine the period as follows: t rp = 2.6 10 6 c srt + 340 10 -6 with t rp in seconds and c srt in farads. 4 4 reset reset changes from low to high whenever v cc drops below the selected reset threshold voltage. reset remains high for the reset timeout period after v cc exceeds the reset threshold.
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 4 sg micro corp www.sg-micro.com electrical characteristics (v cc = 1v to 5.5v, t a = -40 to +85 , typical values are at v cc = 5v and t a = +25 , unless otherwise specified.) parameter symbol conditions min typ max units supply voltage range v cc 1.0 5.5 v v cc 5.0v 3.9 7.0 v cc 3.3v 3.4 5.5 supply current i cc v cc 2.0v 3.0 4.8 a t a = +25 v th - 2.5% v th + 2.5% v cc reset threshold accuracy v th t a = -40 to +85 v th - 3.5% v th + 3.5% v hysteresis v hyst 4 v th mv v cc to reset delay t rd v cc falling at 1mv/s 80 s c srt = 1500pf 3.00 4.25 5.75 reset timeout period t rp c srt = 0 0.34 ms v srt ramp current i ramp v srt = 0 to 0.65v, v cc = 1.6v to 5v 210 na v srt ramp threshold v th-ramp v cc = 1.6v to 5v (v ramp rising) 0.6 v v cc 1.0v, i source = 1a 0.8 v cc v cc 1.8v, i source = 150a 0.8 v cc v cc 2.7v, i source = 500a 0.8 v cc reset output voltage high v oh v cc 4.5v, i source = 800a 0.8 v cc v v cc 1.8v, i sink = 500a 0.3 v cc 2.7v, i sink = 1.2ma 0.3 reset output voltage low v ol v cc 4.5v, i sink = 3.2ma 0.4 v
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 5 sg micro corp www.sg-micro.com typical performance characteristics v cc = 5v, c srt = 1500pf, t a = +25 , unless otherwise noted. supply current vs. supply voltage 0 1 2 3 4 5 6 0123456 supply voltage (v) supply current ( a) -40 +25 +85 v th = 1.63v reset timeout period vs. temperature 300 340 380 420 460 500 -50 -25 0 25 50 75 100 temperature ( ) reset timeout period ( s) c srt = 0 normalized reset threshold vs. temperature 0.994 0.996 0.998 1.000 1.002 1.004 1.006 -50-25 0 255075100 temperature ( ) normalized reset threshold reset timeout period vs. c srt 0.1 1 10 100 1000 10000 0.01 0.1 1 10 100 1000 c srt (nf) reset timeout period (ms) reset timeout period vs. temperature 4.1 4.2 4.3 4.4 4.5 4.6 -50 -25 0 25 50 75 100 temperature ( ) reset timeout period (ms) c srt = 1500pf maximum transient duration vs. reset threshold overdrive 10 20 30 40 50 60 70 0 200 400 600 800 1000 reset threshold overdrive (mv) transient duration (s) v th = 2.93v
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 6 sg micro corp www.sg-micro.com typical performance characteristics v cc = 5v, c srt = 1500pf, t a = +25 , unless otherwise noted.
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 7 sg micro corp www.sg-micro.com detailed description reset output the reset output is typically connected to the reset input of a p. a p?s reset input starts or restarts the p in a known state. the SGM802 p supervisory circuit provides the reset logic to prevent code-execution errors during power-up, power-down, and brownout conditions. reset changes from low to high whenever v cc drops below the threshold voltage. once v cc exceeds the threshold voltage, reset remains high for the capacitor- adjustable reset timeout period. this device output is guaranteed valid for v cc > 1v. operating as a voltage detector the SGM802 can be operated in a voltage detector mode by floating the srt pin. the reset delay times for v cc rising above or falling below the threshold are not significantly different. the reset output is deasserted smoothly without false pulses. selecting a reset capacitor the reset timeout period is adjustable to accommodate a variety of p applications. adjust the reset timeout period (t rp ) by connecting a capacitor (c srt ) between srt and ground. calculate the reset timeout capacitor as follows: c srt = (t rp - 340 10 -6 )/(2.6 10 6 ) where t rp is in seconds and c srt is in farads. the reset delay time is set by a current/capacitor- controlled ramp compared to an internal 0.6v reference. an internal 210na ramp current source charges the external capacitor. the charge to the capacitor is cleared when a reset condition is detected. once the reset condition is removed, the vo ltage on the capacitor ramps according to the formula: dv/dt = i/c. the c srt capacitor must ramp to 0.6v to deassert the reset. c srt must be a low-leakage (<10na) type capacitor; ceramic is recommended. + - v ref reset timeout reset srt gnd c srt SGM802 reset p v cc v cc figure 1. typical operating circuit
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 8 sg micro corp www.sg-micro.com application information negative-going v cc transients in addition to issuing a reset to the p during power-up, power-down, and brownout conditions, this supervisor is relatively immune to short-duration negative-going transients (glitches). the graph maximum transient duration vs. reset threshold overdrive in the typical performance characteristics shows this relationship. the area below the curve of the graph is the region in which these devices typically do not generate a reset pulse. this graph was generated using a negative-going pulse applied to v cc , starting above the actual reset threshold (v th ) and ending below it by the magnitude indicated (reset-threshold overdrive). as the magnitude of the transient decreases (further below the reset threshold), the maximum allowable pulse width- decreases. typically, a v cc transient that goes 100mv below the reset threshold and lasts 50s or less does not cause a reset pulse to be issued. ensuring a valid reset down to v cc = 0 when v cc falls below 1v, reset current-sinking (sourcing) capabilities decline drastically. for applications using the SGM802, a 100k ? pull up resistor between reset and v cc holds reset high when v cc falls below 1v (figure 2). reset v cc v cc gnd SGM802 100k figure 2. ensuring reset valid to v cc = 0 layout consideration srt is a precise current source. when developing the layout for the application, be careful to minimize board capacitance and leakage currents around this pin. traces connected to srt should be kept as short as possible. traces carrying high-speed digital signals and traces with large voltage potentials should be routed as far from srt as possible. leakage current and stray capacitance (e.g., a scope probe) at this pin could cause errors in the reset timeout period. when evaluating these parts, use clean prototype boards to ensure accurate reset periods.
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 9 sg micro corp www.sg-micro.com package outline dimensions sc70-4 (r) e1 e d a a2 a1 l c 0.20 l1 e1 e b d b1 0.05 0.55 0.45 0.75 0.65 1.9 recommended land pattern (unit: mm) dimensions in millimeters dimensions in inches symbol min max min max a 0.900 1.100 0.035 0.043 a1 0.000 0.100 0.000 0.004 a2 0.900 1.000 0.035 0.039 b 0.250 0.400 0.010 0.016 b1 0.350 0.500 0.014 0.020 c 0.080 0.150 0.003 0.006 d 0.050typ 0.002typ d 2.000 2.200 0.079 0.087 e 1.150 1.350 0.045 0.053 e1 2.150 2.450 0.085 0.096 e 0.65 typ 0.026 typ e1 1.200 1.400 0.047 0.055 l 0.525 ref 0.021 ref l1 0.260 0.460 0.010 0.018 0 8 0 8
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 10 sg micro corp www.sg-micro.com package outline dimensions sot-143 e b b1 d d e1 e1 e a a2 a1 l 0.250 c l1 recommended land pattern (unit: mm) 0.95 1.90 0.55 1.0 0.20 2.2 0.95 dimensions in millimeters dimensions in inches symbol min max min max a 0.900 1.150 0.035 0.045 a1 0.000 0.100 0.000 0.004 a2 0.900 1.050 0.035 0.041 b 0.300 0.500 0.012 0.020 b1 0.750 0.900 0.030 0.035 c 0.080 0.150 0.003 0.006 d 2.800 3.000 0.110 0.118 d 0.200 typ 0.008 typ e 1.200 1.400 0.047 0.055 e1 2.250 2.550 0.089 0.100 e 0.95 typ 0.037 typ e1 1.800 2.000 0.071 0.079 l 0.55 ref 0.022 ref l1 0.300 0.500 0.012 0.020 0 8 0 8
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 11 sg micro corp www.sg-micro.com tape and reel information note: the picture is only for reference. please make the object as the standard. key parameter list of tape and reel package type reel diameter reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p0 (mm) p1 (mm) p2 (mm) w (mm) pin1 quadrant sc70-4 (r) 7 9.5 3.2 2.8 1.3 4.0 4.0 2.0 8.0 q3 sot-143 7 9.5 3.2 2.8 1.3 4.0 4.0 2.0 8.0 q3 reel width (w1) reel diameter reel dimensions tape dimensions direction of feed p2 p0 w p1 a0 k0 b0 q1 q2 q4 q3 q3 q4 q2 q1 q3 q4 q2 q1
low-power, sc70/sot p reset circuit with SGM802 capacitor-adju stable reset timeout delay 12 sg micro corp www.sg-micro.com carton box dimensions note: the picture is only for reference. please make the object as the standard. key parameter list of carton box reel type length (mm) width (mm) height (mm) pizza/carton 7 (option) 368 227 224 8 7 442 410 224 18

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